#	date		description					by
--	--------	------------------------------------------	----
01	14/01/17	initial version					BDJ

In the following scheme is showed how ram0-3 are decode as a logical
comination of siz1/siz0 and a1/a0.
Note that not all combinations are legal, but you never know...

siz1	siz0	# of bytes to write
-----------------------------------
0	0		4
0	1		1
1	0		2
1	1		3

siz1	siz0	a1	a0	we0	we1	we2	we3	uds	lds
-----------------------------	--------------------------------------------
0	0	0	0	1	1	1	1	1	1
0	0	0	1		1	1	1		1
0	0	1	0			1	1	1	1
0	0	1	1				1		1
-----------------------------	--------------------------------------------
0	1	0	0	1				1
0	1	0	1		1				1
0	1	1	0			1		1
0	1	1	1				1		1
-----------------------------	--------------------------------------------
1	0	0	0	1	1			1	1
1	0	0	1		1	1			1
1	0	1	0			1	1	1	1
1	0	1	1				1		1
-----------------------------	--------------------------------------------
1	1	0	0	1	1	1		1	1
1	1	0	1		1	1	1		1
1	1	1	0			1	1	1	1
1	1	1	1				1		1

(c) 2017 PE1JPD

CHIP  020tft 20v8

; pin  1     2     3     4     5     6     7     8     9     10    11    12
       res   siz0  siz1  a0    /ds   fc0   fc1   a23   a22   a19   /tft  GND

; pin  13    14    15    16    17    18    19    20    21    22    23    24
       /oe  romack /rst /berr  nas   /ack1 io    /raml /ramh /rom  /as   VCC

@ues 020tft

@define _rom   "/a23*/a22 * as * ds"		; 0x000000 - 0x100000
@define _ram   "/a23* a22 * as * ds"		; 0x400000 - 0x500000
@define _io    " a23*/a22 * as * ds"		; 0x8xxxxx

EQUATIONS

rst	=	res					; hlt connected (via R) to Vcc

nas 	=	as

rom	=	_rom
raml	=	_ram*a0 + _ram*siz1 + _ram*/siz0
ramh	=	_ram*/a0
io	=	_io

; avec	=	fc0 * fc1 * a19		; avec tied to gnd

berr	=	fc0 * fc1 * /a19

ack1	=	_rom*romack + _ram + tft